On November 9, 2026, Google SVP and Chief Technologist Amin Vahdat published Introducing TPU 8tx and TPU 8i Max, adding two systems to Google’s eighth-generation TPU portfolio.
Together with existing TPU 8t and TPU 8i, the lineup now covers four systems in a single year: 8t, 8i, 8tx, and 8i Max. The post stresses an important distinction: these announcements are new TPU systems—packaging, hosts, networking, and security around the chip—not two brand-new chips.
TPU 8tx uses the same silicon as TPU 8t, adds hardware-level confidential computing so data and model weights stay protected while in use, pairs with 5th Generation AMD EPYC hosts, and adopts the Boardfly network. Versus TPU 8t, Google cites up to 2× lower latency. The system targets regulated enterprises and governments running secure inference on sensitive data, and also supports small-scale training, fine-tuning, distillation, and reinforcement learning without moving that data between separate clusters.
TPU 8i Max combines two TPU 8i chips on a single package, delivering double the compute, on-chip SRAM, and HBM bandwidth of TPU 8i for massive context windows and higher compute density within the existing rack footprint.
The same post also notes software updates—including Cloud Pathways and GKE dynamic slicing now generally available, open-source TPU Sync, and a preview TPU agent suite—alongside broader PyTorch and serving-stack work.
Pricing, cloud regions, and a formal availability or GA calendar date are not announced in the post.
For earlier PyTorch-on-TPU tooling—not these two system configs—see Google Open-Sources TorchTPU So PyTorch Runs Natively on TPUs.